Embodiments of the inventive subject matter generally relate to the field of computer processors, and, more particularly, to a virtual unified instruction and data cache for computer processors.
Caches in many processor architectures include multiple levels of caches. Further, a first level cache may be split into an instruction cache and a data cache. While such split caches can be provide very efficient instruction and data retrieval for a processor, there are cases where a split instruction and data cache can be disadvantageous. One example where split instruction and data caches may be disadvantageous involves self-modifying code. Self modifying code is code that modifies instructions of the currently executing program such that new instructions replace previous instructions in memory. Self-modifying code is typically used to increase execution or memory efficiency of a program. However, use of self-modifying code can, in some cases, actually cause inefficient execution of a program. This is due to the fact that can be a lag between when a memory location containing an instruction is modified and when it is present in the instruction cache and used. In the case of self-modifying code, a memory location must be modified and stored in the data cache. The modified data is then stored to a second level cache, which results in the invalidation of the memory location in the instruction cache. Further, instruction pipelines must typically be flushed before the modified instruction can be used. As a result of the extra cache overhead, execution efficiency may suffer.